T. Morie, T. Matsuura, M. Nagata, and A. Iwata
A Multi-Nanodot Floating-Gate MOSFET Circuit for Spiking Neuron Models
IEEE Trans. Nanotechnology, Vol. 2, No. 3, pp. 158-164, Sept. 2003.
[International Conference]
T. Morie, T. Matsuura, M. Nagata, and A. Iwata
An Efficient Clustering Algorithm Using Stochastic Association and Its Implementation Using 3D-Nanodot-Array Structures (Invited)
2003 RCIQE International Seminar on "Quantum Nanoelectronics for Meme-Media-Based Information Technologies", pp. 59-63 , Sapporo, Feb. 13, 2003.
A. Iwata, H.J.Mattaushe, M.M.Mattaushe and H. Sunami
Target and Research Plan of 21st Century Center of Excellence (COE) on Nanoelectronics for Tera-bit Infomation Processing
Proc. of the 1st Hiroshima International Workshop on Nanoelectronics for tera bit Information Processing, pp.2-14, Hiroshima, March 17, 2003.
A. Iwata and M. Sasaki
3-Dimensional global/local wireless interconnection for hierarchical processing systems
Proc. of the 1st Hiroshima International Workshop on Nanoelectronics for tera bit Information Processing, pp.111-116, Hiroshima, March 17, 2003.
H. Ando, T. morie and A. Iwata
Image Segmentation/Extraction using Nonlinear Pixcel-Parallel Networks and theit VLSI Implementation
Proc. of the 1st Hiroshima International Workshop on Nanoelectronics for tera bit Information Processing, pp.117-120, Hiroshima, March 17, 2003.
S. Kameda and T. Yagi
An analog VLSI chip calculating high-precision spatial and temporal derivatives of the vertebrte retina
Proc. of the 1st Hiroshima International Workshop on Nanoelectronics for tera bit Information Processing, pp.121-122, Hiroshima, March 17, 2003.
A. Iwata
(Invited) Advanced Design for Analog-RF and Digital Mixed LSIs- Crosstalknoise Evaluaiton and Reduction
Proc. of the Workshop on SASIMI, pp.17-22, Hiroshima, April 3, 2003.
T. Yoshida, T. Mashimo, M. Akagi, A. Iwata, M. Yoshida and K. Uematsu
A Design of Neural Signal Sensing LSI with Multi-Input-Channels
Proc. of the Workshop on SASIMI, pp. 206-210, Hiroshima, April 3, 2003.
S. Kameda and T. Yagi
A silicon retina system that calculates direction of motion
Proc. The 2003 IEEE International Symposium on Circuits and Systems
vol.IV, pp.792-795, Bangkok, Thailand, 2003.5.
S. Kameda and T. Yagi
An analog silicon retina with multi-chip configuration
International Joint Conference on Neural Networks 2003 Conference Proceedings
pp.387-392, Oregon, the United States, 2003.7.
S. Kameda, M. Sasaki and A. Iwata
A Multi-chip Vision System with a PWM-based Line Parallel Interconnection
Proc. Second Hiroshima International Workshop on Nanoelectronics
for Tera-Bit Information Processing, pp.18-19, 2004.1.
[解説論文]
岩田 穆
21世紀「テラビット情報ナノエレクトロニクス」
電気学会誌,Vol. 123, No. 4. p. 243, 2003.